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CJ2H-CPU65-EIP CJ2 High-Performance CPU Unit 60K Steps Ethernet
SKU: CJ2H-CPU65-EIP
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Omron CJ2H-CPU64-EIP — CJ2H CPU, 50K Steps, EtherNet/IP
SKU: CJ2H-CPU64-EIPUSD 790.00
CJ2H high-performance CPU with built-in EtherNet/IP, 50K steps program memory, 160K words data memory, 0.016 µs LD execution, RS-232C + USB + EtherNet/IP, 3 expansion racks max, 2560 I/O points. Faster than CJ2M series (0.016 vs 0.04 µs).
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Product Overview
The CJ2H-CPU64-EIP is the 50K-step model of Omron's CJ2H high-performance CPU family — the right pick for high-speed machine-control applications where the CJ2M-series CPUs (0.04 µs LD execution) are too slow but the larger CJ2H-CPU68-EIP (400K steps) is overkill. The CJ2H series' 0.016 µs LD instruction execution (16 ns) is 2.5× faster than the CJ2M, allowing higher scan rates for complex motion control, high-speed counting, and fast packaging-line registration. The 50K steps program memory accommodates medium-complexity programs with structured text, function blocks, and ladder; the 160K words data memory (DM 32K + EM 32K × 4 banks) provides ample recipe storage and data-logging buffers.
Where the CJ2H-CPU64-EIP fits in the CJ2H family
The CJ2H family has 5 memory sizes × 2 communication configurations = 10 distinct SKUs. By memory: CJ2H-CPU64(-EIP) (50K steps), CJ2H-CPU65(-EIP) (100K steps), CJ2H-CPU66(-EIP) (150K steps), CJ2H-CPU67(-EIP) (250K steps), CJ2H-CPU68(-EIP) (400K steps). Each size is available as either CPU6@ (no built-in EtherNet/IP, RS-232C + USB) or CPU6@-EIP (built-in EtherNet/IP + RS-232C + USB), so the CJ2H-CPU64 is the 50K-step non-EtherNet/IP sibling of the CPU64-EIP (this SKU). The CJ2H-CPU64-EIP is positioned for high-speed machine-control applications where both fast execution (16 ns LD) and EtherNet/IP connectivity are required — packaging lines with vision inspection, high-speed bottling, multi-axis motion control, and complex assembly cells.
High-speed execution and EtherNet/IP performance
The CJ2H-CPU64-EIP's 0.016 µs (16 ns) LD execution time enables scan rates below 1 ms for medium-sized programs — essential for high-speed packaging and bottling lines where the scan-to-scan time must be faster than the part spacing on the conveyor. For a typical 5K-step program, the LD execution time alone is 5,000 × 16 ns = 80 µs, plus I/O refresh time (0.5 ms for 2560 I/O) and peripheral overhead (200 µs) — total scan time ~1 ms.
Memory layout, task structure, and function block support
The CJ2H-CPU64-EIP has 50K steps program memory, 160K words data memory (DM 32K + EM 32K × 4 banks = 160K words), and the same memory architecture as the CJ2M series but with the higher LD execution speed. The program memory supports cyclic tasks (the main scan), power-off tasks (run on power restoration), scheduled tasks (run at specified intervals), and interrupt tasks (run on external interrupt inputs). Function blocks (FB) and structured text (ST) are supported alongside ladder diagram (LD) — modern programs use LD for sequencing, ST for math/data manipulation, and FB for reusable code blocks (valve control, motor control, PID loop).
Key Features
- CJ2H CPU6@-EIP series — 50K steps program memory
- Built-in EtherNet/IP port
- 160K words data memory
- 0.016 µs LD instruction execution time — 2.5× faster than CJ2M
- Built-in USB Type-B programming port
- Built-in RS-232C serial port
- Built-in EtherNet/IP with 2-port switch
- 2560 I/O points max
- SKU: CJ2H-CPU64-EIP
- Series: CJ2H CJ-series High-performance CPU Units (Built-in EtherNet/IP)
- I/O: 2560 I/O
Best-Fit Applications
- High-speed packaging line registration control — CJ2H-CPU64-EIP scanning in < 1 ms, controlling registration-mark timing on a form-fill-seal machine at.
- Multi-axis motion controller for an assembly cell — CJ2H-CPU64-EIP with CJ2M-MD211 controlling 4 axes of stepper motion, EtherNet/IP connecting to.
- High-speed bottling line control — CJ2H-CPU64-EIP with < 5 ms scan rate, controlling 32 filling valves, 4 capping heads, and.
- Vision-inspection integrated machine — CJ2H-CPU64-EIP receiving inspection results from a Keyence / Cognex vision system over EtherNet/IP, controlling reject mechanisms.
Buying Checklist
- Pick CJ2H-CPU64-EIP for 50K-step high-performance CJ2H CPU with built-in EtherNet/IP
- Pick CJ2H-CPU65-EIP for 100K-step version — pick if your program exceeds 35K steps after compilation
- Pick CJ2H-CPU64 for non-EtherNet/IP version — pick if you don't need Ethernet on the CPU and want to save ~$300
- Pick CJ2M-CPU34 for 20K-step CJ2M CPU with EtherNet/IP — pick for less-demanding applications where scan rate is not critical
- Pick NJ501-1300 for NJ-series with built-in EtherCAT master — pick if your application requires EtherCAT motion control
- Pick CP1L-EM40DT1-D for 40 I/O compact PLC with built-in EtherNet/IP — pick for small machines with simple control
Technical Specifications
| Model | CJ2H-CPU64-EIP |
|---|---|
| Series | CJ2H CJ-series High-performance CPU Units (Built-in EtherNet/IP) |
| Type | PLC CPU Unit, 50K steps program memory, built-in EtherNet/IP |
| Program Capacity | 50K steps |
| Data Memory Capacity | 160K words (DM: 32K words, EM: 32K words × 4 banks) |
| LD Instruction Execution Time | 0.016 µs (16 ns) |
| I/O Bits | 2560 bits (2560 I/O points max) |
| Maximum Expansion Racks | 3 expansion racks (40 I/O units total across all racks) |
| Built-in Communication Ports | EtherNet/IP (100 Mbps, 2-port switch) + USB Type-B (12 Mbps) + RS-232C (DB-9 male) |
| High-Speed Counter Inputs | Via CJ2M-MD211 Pulse I/O Module — 4-axis 100 kHz HSC + 100 kHz pulse output |
| Operating Temperature | 0 to +55 °C |
| Dimensions (H × D × W) | 90 × 65 × 49 mm |
| Current Consumption (5 VDC) | 0.4 A |
| Certifications | UL (Class I Div 2), CSA, CE, Lloyd's Register, EN 61131-2 |
Resources & Downloads
FAQ for CJ2H-CPU64-EIP
What's the difference between CJ2H-CPU64-EIP and CJ2M-CPU34?
Both have built-in EtherNet/IP and are CJ-series CPUs. The CJ2H-CPU64-EIP (this SKU) has 50K steps program memory, 0.016 µs (16 ns) LD execution, and supports scheduled + interrupt tasks in addition to cyclic. The CJ2M-CPU34 has 20K steps program memory, 0.04 µs (40 ns) LD execution, and supports only cyclic + power-off tasks. For applications where scan rate is critical (high-speed packaging, vision inspection integration, complex motion) the CJ2H's 2.5× faster execution and richer task structure are decisive.
How fast is the CJ2H-CPU64-EIP's EtherNet/IP?
The CJ2H-CPU64-EIP's built-in EtherNet/IP supports 32 CIP connections at 100 Mbps, with a 2-port switch for daisy-chain topology (no external switch needed for star topology). The CIP messaging performance is ~3000 messages/second for Class 3 explicit messaging (point-to-point read/write) and ~1500 messages/second for Class 1 cyclic messaging (I/O data exchange). The 2-port switch supports port-forwarding disable for network segmentation and integrated web server for status monitoring (CPU status, scan time, I/O diagnostics).
Can the CJ2H-CPU64-EIP control motion via EtherCAT?
No — the CJ2H-CPU64-EIP does not have built-in EtherCAT master; it can only control motion via the CJ2M-MD211 Pulse I/O Module (100 kHz HSC + 100 kHz pulse output for stepper drives or pulse-train servos). For EtherCAT motion control (servo drives like the R88D-1SN02H-ECT / Accurax 1S series), migrate to the NJ-series CPUs (NJ501-1300 / NJ501-1400 / NJ501-1500) which have built-in EtherCAT master for up to 8 / 16 / 64 axes respectively.
What programming software does the CJ2H-CPU64-EIP use?
CX-Programmer version 9.6+ (included in CX-One 4.6+) for the CJ-series toolchain, OR Sysmac Studio version 1.5+ (included in Sysmac Studio 1.5+) for the Sysmac-family toolchain. Both support the CJ2H-CPU64-EIP with the same I/O tables, memory layout, and instruction set. CX-Programmer is the legacy CJ-series IDE and is preferred for CJ2M-only or CJ2H-only installations.
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